Conventionally, a floating gate of a cell transistor of a NAND flash memory and a resistive part of a resistor element in a peripheral circuit are formed of polysilicon films of the same thickness and same material according to a known technique.
However, according to such a technique, the thickness of the floating gate and the thickness of the resistive part become the same. Therefore, when the thickness of the floating gate is set to be large in order to increase a coupling ratio between the floating gate and a control gate, the thickness of the resistive part also becomes large.
Therefore, to prevent the resistance of the resistor element from decreasing, it is required to change the layout of the resistor element. Specifically, it is required to increase the length of the resistive part. However, this results in the increase of the area of the resistor element, and makes it difficult to miniaturize the circuit.